This invention relates to semiconductor devices such as a thin film transistor (hereinafter referred to as TFT) used for, for example, driving an active matrix liquid display device, and more particularly to a method of producing a semiconductor device having a silicon film crystallized using a so-called catalytic metal element.
Among thin-type, low power consumption liquid crystal display devices, those devices using TFTs for drive elements ensure high performance such as high contrast and high response speed. Therefore, these devices are mainly used for display portions of personal computers (PCs), portable televisions (TVs) and the like, and thus the market scale of TFTs has been expanding markedly.
Some of the TFTs use a CGS (Continuous Grain Silicon) film as a semiconductor for a channel region. As described in JP-A-6-244103, the CGS film is an Si film having excellent crystallinity, which is obtained by depositing a minute amount.of a certain metal element such as Ni on the surface of an amorphous silicon (hereinafter abbreviated to a-Si) film and then conducting a heat treatment thereof. The CGS film ensures low-power consumption and high-speed response compared with the conventional a-Si and polycrystalline silicon (hereinafter abbreviated to p-Si) films. Further, the CGS film has the advantage in that the utilization of its high mobility also permit fabrication of future sheet computers. Thus, the CGS film has been regarded as a promising film that can be used for next-generation liquid crystal display devices.
Incidentally, a CGS film obtained by the above fabrication steps contains atoms of a metal element promoting crystallization. When fabricating a TFT using the CGS film containing the metal element, the metal element acts as an impurity in Si that forms a channel region of the TFT, resulting in the occurrence of energy levels in Si. Therefore, some serious problems such as a change in the threshold voltage of the TFT with time or an increase in OFF current are caused.
In order to solve such problems, a method of removing the metal element is disclosed in JP-A-10-223533. In JP-A-10-223533, parts of the CGS film fabricated are doped with phosphorus (P), a group V element, at a high concentration and then subjected to heat treatment. Thereby, the metal element is gettered to the parts doped with P of the CGS from a region that will become a channel portion of the TFT.
Incidentally, in the method of producing a semiconductor device using the gettering method disclosed in JP-A-10-223533, the element P is selectively introduced into the CGS film and therefore it is necessary to form a mask on the CGS film. Thus, a photolithography step for forming the mask is required. As a result, there is a problem that the number of steps is increased, resulting in an increase in production cost.
Further, after the gettering of the metal element from the channel regions, because the P-doped regions contain the gettered metal element, those regions cannot be used for the fabrication of devices and thus must be removed. As a result, there occurs a limitation in the layout of semiconductor devices such as picture elements, driver elements and the like on the substrate. Accordingly, there occurs a problem that the area of the CGS film required for the production of such semiconductor devices increases, resulting in an increase in the size of the resultant apparatus incorporating those semiconductor devices.
This invention was made in view of the above problems, and an object of the invention is to provide a method of producing a semiconductor device which method performs the gettering without using any masks to thereby reduce production cost and allows reduction of the size of an apparatus incorporating the semiconductor devices produced by this method.
In order to accomplish the above object, a method of producing a semiconductor device according to the present invention comprises the steps of:
crystallizing an amorphous silicon film or a partially crystalline amorphous silicon film using a catalytic metal element promoting crystallization of silicon to form a crystalline first silicon film;
forming a second silicon film containing a group V element directly on an entire surface of the first silicon film;
subjecting the first silicon film and the second silicon film to a heat treatment to thereby getter the catalytic metal element from the first silicon film to the second silicon film; and
removing the second silicon film to which the catalytic metal element has been gettered.
In the method of producing a semiconductor device of this invention, the gettering of the catalytic metal element from the crystalline first silicon film is performed using the second silicon film directly formed on the whole surface of the first silicon film, and not using parts of the first silicon film itself. That is, the method of the invention does not involve selective injection of the group V element into the first silicon film in the gettering process. Therefore, the gettering process requires no mask for selective injection of the group V element and hence no photolithography step for forming a mask. Therefore, the fabrication steps for a semiconductor device are simplified, whereby the production cost can be reduced.
Further, after removing the second silicon film to which the catalytic metal element has been gettered from the first silicon film, the catalytic metal element as an impurity is substantially not present in the first silicon film, and thus the first silicon film does not include any unusable region. Accordingly, there is no limitation in the layout of devices, such as picture elements and driver elements, so that the size of an apparatus incorporating these semiconductor devices can be reduced.
However, there are two possible problems that are inherent to the method of producing a semiconductor device in this invention, i.e., (A) diffusion of atoms of the group V element into the first silicon film, (B) method of removing the second silicon film containing the group V element. Solutions to these problems will be described below.
In the method of producing a semiconductor device according to this invention, there is a possibility that the heat treatment of the first and second silicon films causes the group V element atoms in the second silicon film to migrate or move to the first silicon film. The group V element that has moved into the first silicon film acts as an impurity. Therefore, when fabricating a TFT as the semiconductor device using the first silicon film containing the group V element, the first silicon film containing the group V element adversely affects the properties of the TFT.
In order to prevent the group V element from diffusing into the first silicon film, the difference in diffusion constant between the group V element and the catalytic metal element is utilized. It is known that the diffusion constant within a silicon film of the group V element greatly differs from that of the catalytic element. For example, phosphorus (P) and nickel (Ni) are now selected as representatives of the group V element and the catalytic metal element, respectively. As the catalytic metal element, at least one element selected from a group consisting of Fe, Co, Ni, Cu, Ru, Rh, Pd, Os, Ir, Pt and Au may be used.
In general, the diffusion constant of P within the silicon film is calculated to be 1.47xc3x9710xe2x88x9227 cm2/sec. at 400xc2x0 C., and 2.80xc3x9710xe2x88x9221 cm2/sec. at 600xc2x0 C., while the diffusion constant of Ni within the silicon film is calculated to be 5.84xc3x9710xe2x88x9216 cm2/sec. at 400xc2x0 C., and 1.06xc3x9710xe2x88x9212 cm2/sec. at 600xc2x0 C. As described above, it turns out that, within the silicon film, the diffusion constant of Ni is larger than that of P by about 10 digits.
Based on the diffusion constants of P and Ni, two simulations are tried: (1) diffusion of P into the first silicon film; (2) gettering of Ni to the second silicon film. Conditions for the simulations are as follows. As shown in FIG. 3, P atoms make a reversible migration, or a back and forth movement between the first silicon film indicated by reference numeral 43 and the second silicon film indicated by reference numeral 44, while Ni atoms make a non-reversible migration, or a movement in one direction from the first silicon film 43 to the second silicon film 44 because Ni is gettered by P within the second silicon film. In addition, the interfacial concentration of Ni in the first silicon film 43 is 1xc3x971013 atoms/cm2, while the interfacial concentration of P in the second silicon film 44m is 1xc3x971015 atoms/cm2. Further, the film thickness of the first silicon film 43 is 100 nm, while the film thickness of the second silicon film 44 is set infinite because it is not required on the simulations. Further, when fabricating a TFT using the first silicon film 43, the concentrations of P atoms and Ni atoms in the first silicon film at which these atoms are considered not to adversely affect the properties of the TFT are each not more than 1010 atoms/cm3.
The above conditions for the simulations are substituted for the following equations (1), (2) and (3) The equations (1), (2) and (3) are general equations for impurity diffusion.
(Diffusion Constant of P)                     D        =                  3.85          xc3x97          exp          ⁢                      xe2x80x83                    ⁢                                                    -                3.66                            ⁢                              xe2x80x83                            ⁢              eV                        kt                                              (        1        )            
(Diffusion Constant of Ni)                     D        =                  0.1          xc3x97          exp          ⁢                      xe2x80x83                    ⁢                                                    -                1.9                            ⁢                              xe2x80x83                            ⁢              eV                        kT                                              (        2        )            
(Equation for Calculation of Concentration)                               C          ⁡                      (                          x              ,              t                        )                          =                              Qt                                          π                ⁢                                  xe2x80x83                                ⁢                Dt                                              ⁢          exp          ⁢                      xe2x80x83                    ⁢                                    -                              x                2                                                    4              ⁢              Dt                                                          (        3        )            
where
t: time,
x: depth,
e: electron charge,
T: temperature (unit is K: Kelvin),
k: Boltzmann constant,
Qt: surface concentration of element, and
C (x, t): concentration at a depth of x after a lapse of time of t.
The results that were calculated using the above equations (1), (2) and (3) about the diffusion of P into the first silicon film and the gettering of Ni to the second silicon film are shown in FIG. 4 and FIG. 5, respectively. FIG. 4 is a graph showing the relationship between the concentration of P within the first silicon film 43 and the diffusion depth of P. FIG. 5 is a graph showing the relationship between the time required for the Ni concentration within the first silicon film to reduce to 1010 atoms/cm3 or less and the depth from the interface of the first silicon film 43 and the second silicon film 44.
As shown in FIG. 4, when performing the heat treatment at 600xc2x0 C. for 12 hours to the first and second silicon films 43, 44 (shown in FIG. 3), the concentration of P at a depth of more than 1.5 nm from the surface of the first silicon film is not more than 1010 atoms/cm3. That is, P is hardly diffused at a depth of more than 1.5 nm from the surface of the first silicon film 43.
On the other hand, FIG. 5 indicates that by carrying out the heat treatment at 400xc2x0 C. for 3 hours, the Ni concentration within the first silicon film 43 having a thickness of 100 nm is reduced to 1010 atoms/cm3 or less, and therefore that sufficient gettering is achieved.
In this way, by performing the treatment to the first and second silicon films 43, 44 at an appropriate heating temperature for an appropriate period of time, it becomes possible to getter the catalytic metal element Ni contained in the first silicon film 43 without diffusing the group V element P contained in the upper second silicon film 44 into the first silicon film 43.
According to the calculation, the gettering can be successfully performed by the treatment at a low temperature for a long period of time such as 350xc2x0 C. for 24 hours, or the treatment at a high temperature for a short period of time such as 700xc2x0 C. for 10 minutes. However, in the practical steps, a longer treatment time increases cost. Further, at a higher temperature, there may be some uncertain factors causing diffusion of P into the first silicon film 43, such as trapping of the element due to defects. Therefore, it is considered the most appropriate to perform the heat treatment for gettering Ni as a catalytic metal element at a temperature in the range of 400-600xc2x0 C. for 4 to 12 hours.
It is to be noted that in the method of producing a semiconductor device according to this invention, the upper, second silicon film containing the group V element and the catalytic metal element must be removed after gettering.
As a method of removing the second silicon film containing the group V element and the catalytic metal element, it is conceivable to remove the second silicon film alone by selective etching. However, since the first and second silicon films are both silicon films, it is impossible to selectively remove the second silicon film alone using selective etching. For that reason, as the method of removing the second silicon film, dry etching, the time for which is determined beforehand, may be employed. The etching time may be set such that the whole second silicon film and a part of the first silicon film under the second silicon film are etched.
When performing the dry etching for a predetermined time to remove the second silicon film, there is a possibility that the uniformity in film thickness of the first silicon film after the etching is deteriorated. In order to solve this problem, the ratio in film thickness of the lower, first silicon film to the upper, second silicon film may be increased. What ratio of film thicknesses is required is determined in the following manner.
First, suppose that the film thickness of the upper second silicon film is 1, and that the film thickness of the lower first silicon film is X. As general numerical values for dry etching, the in-plane distribution and the overetching time are set to 10% and +30%, respectively. When completely etching the upper second silicon film under these conditions, the average film thickness to be etched is 1.3, and the film thickness that is most etched is: 1.3xc3x971.1=1.43. The difference between these film thicknesses is: 1.43xe2x88x921.3=0.13. Incidentally, after completely removing the second silicon film by dry etching, the film thickness uniformity, namely flatness, required for the remaining first silicon film is within 5%. Accordingly, there is no problem if the above-mentioned difference in film thickness, i.e., 0.13, is within 5% of the film thickness of the first silicon film. Taking account of the film thickness of 0.3 that is to be overetched, a condition for placing the film thickness difference of 0.13 within 5% of the film thickness of the first silicon film is expressed as follows:
0.13÷(Xxe2x88x920.3) less than 0.05.
From this numerical formula, the value of the film thickness X is calculated to be X greater than 2.9. That is, the ratio in film thickness of the first silicon film to the second silicon film is found to be about 3:1. Therefore, by making the film thickness of the second silicon film not more than one third of that of the first silicon film, the film uniformity, or flatness of the first silicon film can be maintained favorably even if the second silicon film is removed by dry etching.
In one embodiment, the second silicon film is formed by a vapor phase growth method. In this case, it is unnecessary to separately provide the step of adding the group V element. Accordingly, the number of production steps does not increase, and thus the production cost can be reduced.
For a further gettering of atoms of the catalytic metal element that may remain in the first silicon film, the method of the invention may further comprise, after the step of removing the second silicon film:
forming an oxide film on the first silicon film;
subjecting the first silicon film and the oxide film to a heat treatment to thereby getter the catalytic metal element that remains in the first silicon film to the oxide film; and
removing the oxide film.
In order to effectively getter the catalytic metal element from the first silicon film to the oxide film, it is preferable that the heat treatment for the first silicon film and the oxide film is conducted in an oxidizing atmosphere containing at least one halogen and at a temperature of 700-1150xc2x0 C.
The method of the present invention realizes a semiconductor device having a high-quality crystalline silicon film superior in crystal orientation and flatness with extremely few impurities and defects such as pin holes at low cost, and with high productivity and high yield. Thus, if the first silicon film is used for forming an active region of a TFT as the semiconductor device, high-performance of the TFT such as high-speed operation, low leak current, and low-voltage operation is realized. Using such high-performance TFTs, a highly functional active matrix liquid crystal display device, a contact type image sensor, a three-dimensional IC and the like, which have a reduced size, can be realized.
Other objects, features and advantages of the present invention will be obvious from the following description.